# AUCOHL/DFFRAM

<https://repo.masters-masters.com/en/repos/AUCOHL/DFFRAM>

[Home](https://repo.masters-masters.com/en) › [AUCOHL](https://repo.masters-masters.com/en/owners/AUCOHL) › [DFFRAM](https://repo.masters-masters.com/en/repos/AUCOHL/DFFRAM)

AUCOHL/DFFRAM has 176 stars on GitHub. Its RepoMasters card: Prototype tier. Standard Cell Library based Memory Compiler using FF/Latch cells Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [AUCOHL](https://repo.masters-masters.com/en/owners/AUCOHL) |
| Stars | 176 |
| Forks | 38 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | Apache-2.0 |
| Created | 2020 |
| Topics | verilog, vlsi, vlsi-physical-design, vlsi-circuits, electronics-design, asic-design |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [AUCOHL/DFFRAM](https://github.com/AUCOHL/DFFRAM) |

## Repository

Standard Cell Library based Memory Compiler using FF/Latch cells

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by AUCOHL

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.