# MIPSfpga/schoolMIPS

<https://repo.masters-masters.com/en/repos/MIPSfpga/schoolMIPS>

[Home](https://repo.masters-masters.com/en) › [MIPSfpga](https://repo.masters-masters.com/en/owners/MIPSfpga) › [schoolMIPS](https://repo.masters-masters.com/en/repos/MIPSfpga/schoolMIPS)

MIPSfpga/schoolMIPS has 214 stars on GitHub. Its RepoMasters card: Prototype tier. CPU microarchitecture, step by step Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [MIPSfpga](https://repo.masters-masters.com/en/owners/MIPSfpga) |
| Stars | 214 |
| Forks | 63 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2017 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [MIPSfpga/schoolMIPS](https://github.com/MIPSfpga/schoolMIPS) |

## Repository

CPU microarchitecture, step by step

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by MIPSfpga

- [MIPSfpga/mipsfpga-plus · ★ 113 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/MIPSfpga/mipsfpga-plus)

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- [mirkat1206/2021\_Spring\_NCTU\_ICLAB · ★ 214 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/mirkat1206/2021_Spring_NCTU_ICLAB)
- [ultraembedded/riscv\_soc · ★ 213 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/ultraembedded/riscv_soc)
- [zach0zhang/Single\_instruction\_cycle\_OpenMIPS · ★ 210 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/zach0zhang/Single_instruction_cycle_OpenMIPS)
- [risclite/R8051 · ★ 209 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/risclite/R8051)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
