# Obijuan/open-fpga-verilog-tutorial

<https://repo.masters-masters.com/en/repos/Obijuan/open-fpga-verilog-tutorial>

[Home](https://repo.masters-masters.com/en) › [Obijuan](https://repo.masters-masters.com/en/owners/Obijuan) › [open-fpga-verilog-tutorial](https://repo.masters-masters.com/en/repos/Obijuan/open-fpga-verilog-tutorial)

Obijuan/open-fpga-verilog-tutorial has 871 stars on GitHub. Its RepoMasters card: Beta tier. Learn how to design digital systems and synthesize them into an…

| Field | Value |
| --- | --- |
| Owner | [Obijuan](https://repo.masters-masters.com/en/owners/Obijuan) |
| Stars | 871 |
| Forks | 199 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | GPL-2.0 |
| Created | 2015 |
| Topics | verilog, icestorm, linux, lattice, fpgawars, openfpga, fpga |
| Tier | [Beta (700 to 1,999 ★)](https://repo.masters-masters.com/en/ranks/box_office) |
| View on GitHub | [Obijuan/open-fpga-verilog-tutorial](https://github.com/Obijuan/open-fpga-verilog-tutorial) |

## Repository

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

The tier for repos with 700 to 1,999 ★. Published odds per card pulled: 6%. Rarity: Rare.

## More repos by Obijuan

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- [Obijuan/obiscad · ★ 127 · OpenSCAD · Prototype](https://repo.masters-masters.com/en/repos/Obijuan/obiscad)
- [Obijuan/RISC-V-FPGA · ★ 108 · Assembly · Prototype](https://repo.masters-masters.com/en/repos/Obijuan/RISC-V-FPGA)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.