# VerificationExcellence/SystemVerilogReference

<https://repo.masters-masters.com/en/repos/VerificationExcellence/SystemVerilogReference>

[Home](https://repo.masters-masters.com/en) › [VerificationExcellence](https://repo.masters-masters.com/en/owners/VerificationExcellence) › [SystemVerilogReference](https://repo.masters-masters.com/en/repos/VerificationExcellence/SystemVerilogReference)

VerificationExcellence/SystemVerilogReference has 473 stars on GitHub. Its RepoMasters card: Alpha tier. training labs and examples Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [VerificationExcellence](https://repo.masters-masters.com/en/owners/VerificationExcellence) |
| Stars | 473 |
| Forks | 178 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | None |
| Created | 2014 |
| Tier | [Alpha (250 to 699 ★)](https://repo.masters-masters.com/en/ranks/b_movie) |
| View on GitHub | [VerificationExcellence/SystemVerilogReference](https://github.com/VerificationExcellence/SystemVerilogReference) |

## Repository

training labs and examples

The tier for repos with 250 to 699 ★. Published odds per card pulled: 20%. Rarity: Uncommon.

## More repos by VerificationExcellence

- [VerificationExcellence/UVMReference · ★ 308 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/VerificationExcellence/UVMReference)

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- [NVlabs/verilog-eval · ★ 491 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/NVlabs/verilog-eval)
- [baochip/baochip-1x · ★ 485 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/baochip/baochip-1x)
- [taichi-ishitani/tvip-axi · ★ 483 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/taichi-ishitani/tvip-axi)
- [fpgasystems/Coyote · ★ 468 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/fpgasystems/Coyote)
- [RoaLogic/RV12 · ★ 454 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/RoaLogic/RV12)
- [WangXuan95/USTC-RVSoC · ★ 442 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/USTC-RVSoC)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.