# WangXuan95/FPGA-SDcard-Reader

<https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-SDcard-Reader>

[Home](https://repo.masters-masters.com/en) › [WangXuan95](https://repo.masters-masters.com/en/owners/WangXuan95) › [FPGA-SDcard-Reader](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-SDcard-Reader)

WangXuan95/FPGA-SDcard-Reader has 351 stars on GitHub. Its RepoMasters card: Alpha tier. An FPGA-based SD-card reader to read files from FAT16 or FAT32…

| Field | Value |
| --- | --- |
| Owner | [WangXuan95](https://repo.masters-masters.com/en/owners/WangXuan95) |
| Stars | 351 |
| Forks | 83 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | GPL-3.0 |
| Created | 2019 |
| Topics | fpga, rtl, sdcard, sd-card, file-system, verilog, systemverilog, sdio |
| Tier | [Alpha (250 to 699 ★)](https://repo.masters-masters.com/en/ranks/b_movie) |
| View on GitHub | [WangXuan95/FPGA-SDcard-Reader](https://github.com/WangXuan95/FPGA-SDcard-Reader) |

## Repository

An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。

The tier for repos with 250 to 699 ★. Published odds per card pulled: 20%. Rarity: Uncommon.

## More repos by WangXuan95

- [WangXuan95/FPGA-FOC · ★ 994 · Verilog · Beta](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-FOC)
- [WangXuan95/FPGA-USB-Device · ★ 934 · Verilog · Beta](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-USB-Device)
- [WangXuan95/Xilinx-FPGA-PCIe-XDMA-Tutorial · ★ 869 · Batchfile · Beta](https://repo.masters-masters.com/en/repos/WangXuan95/Xilinx-FPGA-PCIe-XDMA-Tutorial)
- [WangXuan95/BSV\_Tutorial\_cn · ★ 612 · Bluespec · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/BSV_Tutorial_cn)
- [WangXuan95/USTC-RVSoC · ★ 442 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/USTC-RVSoC)
- [WangXuan95/FPGA-ftdi245fifo · ★ 363 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-ftdi245fifo)

## Nearby in Verilog

- [FPGAwars/icezum · ★ 357 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/FPGAwars/icezum)
- [ZipCPU/wbuart32 · ★ 356 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/ZipCPU/wbuart32)
- [WangXuan95/FPGA-UART · ★ 354 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-UART)
- [WangXuan95/FPGA-JPEG-LS-encoder · ★ 347 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-JPEG-LS-encoder)
- [marmolejo/zet · ★ 345 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/marmolejo/zet)
- [jotego/jtcores · ★ 345 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/jotego/jtcores)

---
Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.