# WangXuan95/UH-JLS

<https://repo.masters-masters.com/en/repos/WangXuan95/UH-JLS>

[Home](https://repo.masters-masters.com/en) › [WangXuan95](https://repo.masters-masters.com/en/owners/WangXuan95) › [UH-JLS](https://repo.masters-masters.com/en/repos/WangXuan95/UH-JLS)

WangXuan95/UH-JLS has 108 stars on GitHub. Its RepoMasters card: Prototype tier. An FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless…

| Field | Value |
| --- | --- |
| Owner | [WangXuan95](https://repo.masters-masters.com/en/owners/WangXuan95) |
| Stars | 108 |
| Forks | 22 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | GPL-3.0 |
| Created | 2021 |
| Topics | fpga, image-compression, image-encoder, jpeg-ls, verilog |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [WangXuan95/UH-JLS](https://github.com/WangXuan95/UH-JLS) |

## Repository

An FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器，用来进行无损图像压缩。

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by WangXuan95

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- [WangXuan95/USTC-RVSoC · ★ 442 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/WangXuan95/USTC-RVSoC)
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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.