# Weiyet/MakerCode\_RTLChallenge

<https://repo.masters-masters.com/en/repos/Weiyet/MakerCode_RTLChallenge>

[Home](https://repo.masters-masters.com/en) › [Weiyet](https://repo.masters-masters.com/en/owners/Weiyet) › [MakerCode\_RTLChallenge](https://repo.masters-masters.com/en/repos/Weiyet/MakerCode_RTLChallenge)

Weiyet/MakerCode\_RTLChallenge has 109 stars on GitHub. Its RepoMasters card: Prototype tier. Public RTL Question Bank of MakerCode… Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [Weiyet](https://repo.masters-masters.com/en/owners/Weiyet) |
| Stars | 109 |
| Forks | 27 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | MIT |
| Created | 2026 |
| Topics | asic-design, fpga, programming, puzzle, rtl-design |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [Weiyet/MakerCode\_RTLChallenge](https://github.com/Weiyet/MakerCode_RTLChallenge) |

## Repository

Public RTL Question Bank of MakerCode https://makercode.jixiao-ai.com/

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in SystemVerilog

- [trivialmips/TrivialMIPS · ★ 110 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/trivialmips/TrivialMIPS)
- [eliaskousk/parallella-riscv · ★ 109 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/eliaskousk/parallella-riscv)
- [mmxsrup/axi4-interface · ★ 109 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/mmxsrup/axi4-interface)
- [spcl/pspin · ★ 108 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/spcl/pspin)
- [WangXuan95/UH-JLS · ★ 108 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/WangXuan95/UH-JLS)

---
Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
