# ZipCPU/autofpga

<https://repo.masters-masters.com/en/repos/ZipCPU/autofpga>

[Home](https://repo.masters-masters.com/en) › [ZipCPU](https://repo.masters-masters.com/en/owners/ZipCPU) › [autofpga](https://repo.masters-masters.com/en/repos/ZipCPU/autofpga)

ZipCPU/autofpga has 194 stars on GitHub. Its RepoMasters card: Prototype tier. A utility for Composing FPGA designs from Peripherals Language: C++.

| Field | Value |
| --- | --- |
| Owner | [ZipCPU](https://repo.masters-masters.com/en/owners/ZipCPU) |
| Stars | 194 |
| Forks | 24 |
| Language | [C++](https://repo.masters-masters.com/en/languages/c-plus-plus) |
| License | GPL-3.0 |
| Created | 2017 |
| Topics | wishbone-bus, wishbone, fpga, c-plus-plus, verilog, verilator |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [ZipCPU/autofpga](https://github.com/ZipCPU/autofpga) |

## Repository

A utility for Composing FPGA designs from Peripherals

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.