# adamgallas/llama-fpga

<https://repo.masters-masters.com/en/repos/adamgallas/llama-fpga>

[Home](https://repo.masters-masters.com/en) › [adamgallas](https://repo.masters-masters.com/en/owners/adamgallas) › [llama-fpga](https://repo.masters-masters.com/en/repos/adamgallas/llama-fpga)

adamgallas/llama-fpga has 223 stars on GitHub. Its RepoMasters card: Prototype tier. \[DATE'25, ICCAD'25\] An embedded FPGA-based LLM accelerator capable of…

| Field | Value |
| --- | --- |
| Owner | [adamgallas](https://repo.masters-masters.com/en/owners/adamgallas) |
| Stars | 223 |
| Forks | 39 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2025 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [adamgallas/llama-fpga](https://github.com/adamgallas/llama-fpga) |

## Repository

\[DATE'25, ICCAD'25\] An embedded FPGA-based LLM accelerator capable of supporting Llama2-7B

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by adamgallas

- [adamgallas/fpga\_accelerator\_yolov3tiny · ★ 297 · VHDL · Alpha](https://repo.masters-masters.com/en/repos/adamgallas/fpga_accelerator_yolov3tiny)

## Nearby in Verilog

- [WangXuan95/FPGA-DDR-SDRAM · ★ 224 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-DDR-SDRAM)
- [emu-russia/breaks · ★ 223 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/emu-russia/breaks)
- [YosysHQ/riscv-formal · ★ 223 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/YosysHQ/riscv-formal)
- [wuxx/icesugar-pro · ★ 222 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/wuxx/icesugar-pro)
- [ShawnHymel/introduction-to-fpga · ★ 219 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/ShawnHymel/introduction-to-fpga)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.