# bunny965/yolov5-fpga-hardware-acceleration

<https://repo.masters-masters.com/en/repos/bunny965/yolov5-fpga-hardware-acceleration>

[Home](https://repo.masters-masters.com/en) › [bunny965](https://repo.masters-masters.com/en/owners/bunny965) › [yolov5-fpga-hardware-acceleration](https://repo.masters-masters.com/en/repos/bunny965/yolov5-fpga-hardware-acceleration)

bunny965/yolov5-fpga-hardware-acceleration has 152 stars on GitHub. Its RepoMasters card: Prototype tier. 网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持…

| Field | Value |
| --- | --- |
| Owner | [bunny965](https://repo.masters-masters.com/en/owners/bunny965) |
| Stars | 152 |
| Forks | 21 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | GPL-3.0 |
| Created | 2023 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [bunny965/yolov5-fpga-hardware-acceleration](https://github.com/bunny965/yolov5-fpga-hardware-acceleration) |

## Repository

网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in Verilog

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- [freecores/verilog\_fixed\_point\_math\_library · ★ 151 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/freecores/verilog_fixed_point_math_library)
- [chipsalliance/aib-phy-hardware · ★ 151 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/chipsalliance/aib-phy-hardware)
- [SocialistDalao/UltraMIPS\_NSCSCC · ★ 151 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/SocialistDalao/UltraMIPS_NSCSCC)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.