# dpretet/axi-crossbar

<https://repo.masters-masters.com/en/repos/dpretet/axi-crossbar>

[Home](https://repo.masters-masters.com/en) › [dpretet](https://repo.masters-masters.com/en/owners/dpretet) › [axi-crossbar](https://repo.masters-masters.com/en/repos/dpretet/axi-crossbar)

dpretet/axi-crossbar has 251 stars on GitHub. Its RepoMasters card: Alpha tier. Parametric AXI4 crossbar in SystemVerilog Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [dpretet](https://repo.masters-masters.com/en/owners/dpretet) |
| Stars | 251 |
| Forks | 41 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | MIT |
| Created | 2021 |
| Topics | axi4, axi4-lite, axi4-protocol, axi4-full, crossbar, interconnect, fpga, fpga-soc, processor, asic-design |
| Tier | [Alpha (250 to 699 ★)](https://repo.masters-masters.com/en/ranks/b_movie) |
| View on GitHub | [dpretet/axi-crossbar](https://github.com/dpretet/axi-crossbar) |

## Repository

Parametric AXI4 crossbar in SystemVerilog

The tier for repos with 250 to 699 ★. Published odds per card pulled: 20%. Rarity: Uncommon.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.