# erihsu/INT\_FP\_MAC

<https://repo.masters-masters.com/en/repos/erihsu/INT_FP_MAC>

[Home](https://repo.masters-masters.com/en) › [erihsu](https://repo.masters-masters.com/en/owners/erihsu) › [INT\_FP\_MAC](https://repo.masters-masters.com/en/repos/erihsu/INT_FP_MAC)

erihsu/INT\_FP\_MAC has 125 stars on GitHub. Its RepoMasters card: Prototype tier. INT8 & FP16 multiplier accumulator (MAC) design with UVM verification…

| Field | Value |
| --- | --- |
| Owner | [erihsu](https://repo.masters-masters.com/en/owners/erihsu) |
| Stars | 125 |
| Forks | 19 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | MIT |
| Created | 2020 |
| Topics | verilog, uvm, accumulator, systemverilog |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [erihsu/INT\_FP\_MAC](https://github.com/erihsu/INT_FP_MAC) |

## Repository

INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in Verilog

- [openrisc/orpsoc-cores · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/openrisc/orpsoc-cores)
- [Lichee-Pi/Tang\_FPGA\_Examples · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/Lichee-Pi/Tang_FPGA_Examples)
- [lac-dcc/chimera · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/lac-dcc/chimera)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.