# esynr3z/corsair

<https://repo.masters-masters.com/en/repos/esynr3z/corsair>

[Home](https://repo.masters-masters.com/en) › [esynr3z](https://repo.masters-masters.com/en/owners/esynr3z) › [corsair](https://repo.masters-masters.com/en/repos/esynr3z/corsair)

esynr3z/corsair has 149 stars on GitHub. Its RepoMasters card: Prototype tier. Control and Status Register map generator for HDL projects Language: Python.

| Field | Value |
| --- | --- |
| Owner | [esynr3z](https://repo.masters-masters.com/en/owners/esynr3z) |
| Stars | 149 |
| Forks | 43 |
| Language | [Python](https://repo.masters-masters.com/en/languages/python) |
| License | MIT |
| Created | 2020 |
| Topics | asic, fpga, verilog, system-verilog, python |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [esynr3z/corsair](https://github.com/esynr3z/corsair) |

## Repository

Control and Status Register map generator for HDL projects

Archived: this repository is read-only

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
