# fpganinja/taxi

<https://repo.masters-masters.com/en/repos/fpganinja/taxi>

[Home](https://repo.masters-masters.com/en) › [fpganinja](https://repo.masters-masters.com/en/owners/fpganinja) › [taxi](https://repo.masters-masters.com/en/repos/fpganinja/taxi)

fpganinja/taxi has 1,004 stars on GitHub. Its RepoMasters card: Beta tier. AXI, AXI stream, Ethernet, and PCIe components in System Verilog

| Field | Value |
| --- | --- |
| Owner | [fpganinja](https://repo.masters-masters.com/en/owners/fpganinja) |
| Stars | 1,004 |
| Forks | 159 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | CERN-OHL-S-2.0 |
| Created | 2025 |
| Tier | [Beta (700 to 1,999 ★)](https://repo.masters-masters.com/en/ranks/box_office) |
| View on GitHub | [fpganinja/taxi](https://github.com/fpganinja/taxi) |

## Repository

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

The tier for repos with 700 to 1,999 ★. Published odds per card pulled: 6%. Rarity: Rare.

## Nearby in SystemVerilog

- [hdl-util/hdmi · ★ 1,310 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/hdl-util/hdmi)
- [rsd-devel/rsd · ★ 1,214 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/rsd-devel/rsd)
- [syntacore/scr1 · ★ 1,013 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/syntacore/scr1)
- [chipsalliance/Cores-VeeR-EH1 · ★ 971 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/chipsalliance/Cores-VeeR-EH1)
- [westerndigitalcorporation/swerv\_eh1 · ★ 882 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/westerndigitalcorporation/swerv_eh1)
- [black-parrot/black-parrot · ★ 841 · SystemVerilog · Beta](https://repo.masters-masters.com/en/repos/black-parrot/black-parrot)

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Data: GitHub · Illustration: the project’s public image, pixelated by RepoMasters.
