# hrvach/fpg1

<https://repo.masters-masters.com/en/repos/hrvach/fpg1>

[Home](https://repo.masters-masters.com/en) › [hrvach](https://repo.masters-masters.com/en/owners/hrvach) › [fpg1](https://repo.masters-masters.com/en/repos/hrvach/fpg1)

hrvach/fpg1 has 195 stars on GitHub. Its RepoMasters card: Prototype tier. FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and…

| Field | Value |
| --- | --- |
| Owner | [hrvach](https://repo.masters-masters.com/en/owners/hrvach) |
| Stars | 195 |
| Forks | 18 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | MIT |
| Created | 2018 |
| Topics | verilog, fpga, retrocomputing, pdp-1, emulator, mister, misterfpga |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [hrvach/fpg1](https://github.com/hrvach/fpg1) |

## Repository

FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

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- [FPGADude/Digital-Design · ★ 193 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/FPGADude/Digital-Design)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.