# ijor/fx68k

<https://repo.masters-masters.com/en/repos/ijor/fx68k>

[Home](https://repo.masters-masters.com/en) › [ijor](https://repo.masters-masters.com/en/owners/ijor) › [fx68k](https://repo.masters-masters.com/en/repos/ijor/fx68k)

ijor/fx68k has 174 stars on GitHub. Its RepoMasters card: Prototype tier. FX68K 68000 cycle accurate SystemVerilog core Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [ijor](https://repo.masters-masters.com/en/owners/ijor) |
| Stars | 174 |
| Forks | 40 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | GPL-3.0 |
| Created | 2018 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [ijor/fx68k](https://github.com/ijor/fx68k) |

## Repository

FX68K 68000 cycle accurate SystemVerilog core

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in SystemVerilog

- [Xilinx/RecoNIC · ★ 181 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/Xilinx/RecoNIC)
- [agg23/fpga-tamagotchi · ★ 178 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/agg23/fpga-tamagotchi)
- [kilmu1337/VGK-DMA-BYPASS · ★ 178 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/kilmu1337/VGK-DMA-BYPASS)
- [mbits-mirafra/SystemVerilogCourse · ★ 173 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/mbits-mirafra/SystemVerilogCourse)
- [zeroasiccorp/umi · ★ 172 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/zeroasiccorp/umi)
- [mayurkubavat/UVM-Examples · ★ 169 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/mayurkubavat/UVM-Examples)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.