# jakubcabal/uart-for-fpga

<https://repo.masters-masters.com/en/repos/jakubcabal/uart-for-fpga>

[Home](https://repo.masters-masters.com/en) › [jakubcabal](https://repo.masters-masters.com/en/owners/jakubcabal) › [uart-for-fpga](https://repo.masters-masters.com/en/repos/jakubcabal/uart-for-fpga)

jakubcabal/uart-for-fpga has 111 stars on GitHub. Its RepoMasters card: Prototype tier. Simple UART controller for FPGA written in VHDL Language: VHDL.

| Field | Value |
| --- | --- |
| Owner | [jakubcabal](https://repo.masters-masters.com/en/owners/jakubcabal) |
| Stars | 111 |
| Forks | 31 |
| Language | [VHDL](https://repo.masters-masters.com/en/languages/vhdl) |
| License | MIT |
| Created | 2015 |
| Topics | uart, fpga, uart-controller, vhdl, controller, wishbone, wishbone-bus, uart-loopback, simulation, ghdl |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [jakubcabal/uart-for-fpga](https://github.com/jakubcabal/uart-for-fpga) |

## Repository

Simple UART controller for FPGA written in VHDL

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by jakubcabal

- [jakubcabal/spi-fpga · ★ 188 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/jakubcabal/spi-fpga)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.