# jamieiles/uart

<https://repo.masters-masters.com/en/repos/jamieiles/uart>

[Home](https://repo.masters-masters.com/en) › [jamieiles](https://repo.masters-masters.com/en/owners/jamieiles) › [uart](https://repo.masters-masters.com/en/repos/jamieiles/uart)

jamieiles/uart has 203 stars on GitHub. Its RepoMasters card: Prototype tier. Verilog UART Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [jamieiles](https://repo.masters-masters.com/en/owners/jamieiles) |
| Stars | 203 |
| Forks | 44 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2013 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [jamieiles/uart](https://github.com/jamieiles/uart) |

## Repository

Verilog UART

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by jamieiles

- [jamieiles/80x86 · ★ 422 · C++ · Alpha](https://repo.masters-masters.com/en/repos/jamieiles/80x86)
- [jamieiles/oldland-cpu · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/jamieiles/oldland-cpu)

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- [AngeloJacobo/FPGA\_Book\_Experiments · ★ 203 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/AngeloJacobo/FPGA_Book_Experiments)
- [taoyilee/clacc · ★ 202 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/taoyilee/clacc)
- [pwmarcz/fpga-chip8 · ★ 202 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/pwmarcz/fpga-chip8)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.