# jjejdhhd/License-Plate-Recognition-FPGA

<https://repo.masters-masters.com/en/repos/jjejdhhd/License-Plate-Recognition-FPGA>

[Home](https://repo.masters-masters.com/en) › [jjejdhhd](https://repo.masters-masters.com/en/owners/jjejdhhd) › [License-Plate-Recognition-FPGA](https://repo.masters-masters.com/en/repos/jjejdhhd/License-Plate-Recognition-FPGA)

jjejdhhd/License-Plate-Recognition-FPGA has 128 stars on GitHub. Its RepoMasters card: Prototype tier. 基于FPGA进行车牌识别 Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [jjejdhhd](https://repo.masters-masters.com/en/owners/jjejdhhd) |
| Stars | 128 |
| Forks | 22 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2023 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [jjejdhhd/License-Plate-Recognition-FPGA](https://github.com/jjejdhhd/License-Plate-Recognition-FPGA) |

## Repository

基于FPGA进行车牌识别

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by jjejdhhd

- [jjejdhhd/Learn\_stm32f103 · ★ 113 · C · Prototype](https://repo.masters-masters.com/en/repos/jjejdhhd/Learn_stm32f103)

## Nearby in Verilog

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
