# lisper/cpus-caddr

<https://repo.masters-masters.com/en/repos/lisper/cpus-caddr>

[Home](https://repo.masters-masters.com/en) › [lisper](https://repo.masters-masters.com/en/owners/lisper) › [cpus-caddr](https://repo.masters-masters.com/en/repos/lisper/cpus-caddr)

lisper/cpus-caddr has 166 stars on GitHub. Its RepoMasters card: Prototype tier. FPGA based MIT CADR lisp machine - rewritten in modern verilog - boots and runs

| Field | Value |
| --- | --- |
| Owner | [lisper](https://repo.masters-masters.com/en/owners/lisper) |
| Stars | 166 |
| Forks | 16 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2016 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [lisper/cpus-caddr](https://github.com/lisper/cpus-caddr) |

## Repository

FPGA based MIT CADR lisp machine - rewritten in modern verilog - boots and runs

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by lisper

- [lisper/emulator-sun-2 · ★ 153 · Roff · Prototype](https://repo.masters-masters.com/en/repos/lisper/emulator-sun-2)

## Nearby in Verilog

- [chriz2600/DreamcastHDMI · ★ 167 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/chriz2600/DreamcastHDMI)
- [onchipuis/mriscv · ★ 166 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/onchipuis/mriscv)
- [regymm/quasiSoC · ★ 166 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/regymm/quasiSoC)
- [drandyhaas/Haasoscope · ★ 165 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/drandyhaas/Haasoscope)
- [mhyousefi/MIPS-pipeline-processor · ★ 164 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/mhyousefi/MIPS-pipeline-processor)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.