# m-labs/lm32

<https://repo.masters-masters.com/en/repos/m-labs/lm32>

[Home](https://repo.masters-masters.com/en) › [m-labs](https://repo.masters-masters.com/en/owners/m-labs) › [lm32](https://repo.masters-masters.com/en/repos/m-labs/lm32)

m-labs/lm32 has 105 stars on GitHub. Its RepoMasters card: Prototype tier. LatticeMico32 soft processor Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [m-labs](https://repo.masters-masters.com/en/owners/m-labs) |
| Stars | 105 |
| Forks | 28 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2012 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [m-labs/lm32](https://github.com/m-labs/lm32) |

## Repository

LatticeMico32 soft processor

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by m-labs

- [m-labs/migen · ★ 1,330 · Python · Beta](https://repo.masters-masters.com/en/repos/m-labs/migen)
- [m-labs/nmigen · ★ 689 · Python · Alpha](https://repo.masters-masters.com/en/repos/m-labs/nmigen)
- [m-labs/artiq · ★ 514 · Python · Alpha](https://repo.masters-masters.com/en/repos/m-labs/artiq)
- [m-labs/misoc · ★ 342 · Python · Alpha](https://repo.masters-masters.com/en/repos/m-labs/misoc)
- [m-labs/milkymist · ★ 155 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/m-labs/milkymist)

## Nearby in Verilog

- [WangXuan95/FPGA-RMII-SMII · ★ 106 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-RMII-SMII)
- [smunaut/iCE40linux · ★ 105 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/smunaut/iCE40linux)
- [kilmu1337/pcileech-rtl8188ee-wifi-emul · ★ 105 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/kilmu1337/pcileech-rtl8188ee-wifi-emul)
- [lynxis/lpc\_sniffer · ★ 104 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/lynxis/lpc_sniffer)
- [nishthaparashar/Floating-Point-ALU-in-Verilog · ★ 104 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/nishthaparashar/Floating-Point-ALU-in-Verilog)

---
Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.