# mathis-s/SoomRV

<https://repo.masters-masters.com/en/repos/mathis-s/SoomRV>

[Home](https://repo.masters-masters.com/en) › [mathis-s](https://repo.masters-masters.com/en/owners/mathis-s) › [SoomRV](https://repo.masters-masters.com/en/repos/mathis-s/SoomRV)

mathis-s/SoomRV has 259 stars on GitHub. Its RepoMasters card: Alpha tier. A simple superscalar out-of-order RISC-V microprocessor Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [mathis-s](https://repo.masters-masters.com/en/owners/mathis-s) |
| Stars | 259 |
| Forks | 23 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | MIT |
| Created | 2022 |
| Topics | risc-v, computer-architecture, cpu, ooo, out-of-order, systemverilog |
| Tier | [Alpha (250 to 699 ★)](https://repo.masters-masters.com/en/ranks/b_movie) |
| View on GitHub | [mathis-s/SoomRV](https://github.com/mathis-s/SoomRV) |

## Repository

A simple superscalar out-of-order RISC-V microprocessor

The tier for repos with 250 to 699 ★. Published odds per card pulled: 20%. Rarity: Uncommon.

## Nearby in SystemVerilog

- [openhwfoundation/cv32e40x · ★ 289 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/openhwfoundation/cv32e40x)
- [chipsalliance/Cores-VeeR-EH2 · ★ 283 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/chipsalliance/Cores-VeeR-EH2)
- [intel/fpga-npu · ★ 267 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/intel/fpga-npu)
- [pulp-platform/iDMA · ★ 254 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/pulp-platform/iDMA)
- [dpretet/axi-crossbar · ★ 251 · SystemVerilog · Alpha](https://repo.masters-masters.com/en/repos/dpretet/axi-crossbar)
- [ARC-Lab-UF/sv-tutorial · ★ 248 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/ARC-Lab-UF/sv-tutorial)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
