# mattvenn/basic-ecp5-pcb

<https://repo.masters-masters.com/en/repos/mattvenn/basic-ecp5-pcb>

[Home](https://repo.masters-masters.com/en) › [mattvenn](https://repo.masters-masters.com/en/owners/mattvenn) › [basic-ecp5-pcb](https://repo.masters-masters.com/en/repos/mattvenn/basic-ecp5-pcb)

mattvenn/basic-ecp5-pcb has 144 stars on GitHub. Its RepoMasters card: Prototype tier. Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi…

| Field | Value |
| --- | --- |
| Owner | [mattvenn](https://repo.masters-masters.com/en/owners/mattvenn) |
| Stars | 144 |
| Forks | 30 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | CC0-1.0 |
| Created | 2020 |
| Topics | fpga, hardware, pcb |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [mattvenn/basic-ecp5-pcb](https://github.com/mattvenn/basic-ecp5-pcb) |

## Repository

Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by mattvenn

- [mattvenn/awesome-opensource-asic-resources · ★ 422 · Alpha](https://repo.masters-masters.com/en/repos/mattvenn/awesome-opensource-asic-resources)

## Nearby in Verilog

- [aquaxis/IPCORE · ★ 144 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/aquaxis/IPCORE)
- [racerxdl/riskow · ★ 144 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/racerxdl/riskow)
- [MoonshotAI/nano-kpu · ★ 144 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/MoonshotAI/nano-kpu)
- [abdelazeem201/Cadence-RTL-to-GDSII-Flow · ★ 141 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/abdelazeem201/Cadence-RTL-to-GDSII-Flow)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
