# mbits-mirafra/SystemVerilogCourse

<https://repo.masters-masters.com/en/repos/mbits-mirafra/SystemVerilogCourse>

[Home](https://repo.masters-masters.com/en) › [mbits-mirafra](https://repo.masters-masters.com/en/owners/mbits-mirafra) › [SystemVerilogCourse](https://repo.masters-masters.com/en/repos/mbits-mirafra/SystemVerilogCourse)

mbits-mirafra/SystemVerilogCourse has 172 stars on GitHub. Its RepoMasters card: Prototype tier. This is a detailed SystemVerilog course

| Field | Value |
| --- | --- |
| Owner | [mbits-mirafra](https://repo.masters-masters.com/en/owners/mbits-mirafra) |
| Stars | 172 |
| Forks | 64 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | None |
| Created | 2022 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [mbits-mirafra/SystemVerilogCourse](https://github.com/mbits-mirafra/SystemVerilogCourse) |

## Repository

This is a detailed SystemVerilog course

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
