# mgtm98/pcie5\_phy

<https://repo.masters-masters.com/en/repos/mgtm98/pcie5_phy>

[Home](https://repo.masters-masters.com/en) › [mgtm98](https://repo.masters-masters.com/en/owners/mgtm98) › [pcie5\_phy](https://repo.masters-masters.com/en/repos/mgtm98/pcie5_phy)

mgtm98/pcie5\_phy has 109 stars on GitHub. Its RepoMasters card: Prototype tier. PCIE 5.0 Graduation project (Verification Team) Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [mgtm98](https://repo.masters-masters.com/en/owners/mgtm98) |
| Stars | 109 |
| Forks | 43 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2021 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [mgtm98/pcie5\_phy](https://github.com/mgtm98/pcie5_phy) |

## Repository

PCIE 5.0 Graduation project (Verification Team)

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in Verilog

- [zhan6841/FPGA-Accelerator-for-AES-LeNet-VGG16 · ★ 109 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/zhan6841/FPGA-Accelerator-for-AES-LeNet-VGG16)
- [viktor-prutyanov/drec-fpga-intro · ★ 109 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/viktor-prutyanov/drec-fpga-intro)
- [zf3/psram-tang-nano-9k · ★ 109 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/zf3/psram-tang-nano-9k)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.