# nand2mario/486tang

<https://repo.masters-masters.com/en/repos/nand2mario/486tang>

[Home](https://repo.masters-masters.com/en) › [nand2mario](https://repo.masters-masters.com/en/owners/nand2mario) › [486tang](https://repo.masters-masters.com/en/repos/nand2mario/486tang)

nand2mario/486tang has 128 stars on GitHub. Its RepoMasters card: Prototype tier. 80486 on the Sipeed Tang Console 138K FPGA Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [nand2mario](https://repo.masters-masters.com/en/owners/nand2mario) |
| Stars | 128 |
| Forks | 18 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | BSD-3-Clause |
| Created | 2025 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [nand2mario/486tang](https://github.com/nand2mario/486tang) |

## Repository

80486 on the Sipeed Tang Console 138K FPGA

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by nand2mario

- [nand2mario/nestang · ★ 460 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/nand2mario/nestang)
- [nand2mario/snestang · ★ 298 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/nand2mario/snestang)
- [nand2mario/z386 · ★ 192 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/nand2mario/z386)
- [nand2mario/usb\_hid\_host · ★ 181 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/nand2mario/usb_hid_host)
- [nand2mario/tangcore · ★ 151 · Batchfile · Prototype](https://repo.masters-masters.com/en/repos/nand2mario/tangcore)
- [nand2mario/z486\_MiSTer · ★ 124 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/nand2mario/z486_MiSTer)

## Nearby in Verilog

- [esa-tu-darmstadt/tapasco · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/esa-tu-darmstadt/tapasco)
- [BerkeleyLab/Bedrock · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/BerkeleyLab/Bedrock)
- [jjejdhhd/License-Plate-Recognition-FPGA · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/jjejdhhd/License-Plate-Recognition-FPGA)
- [jamieiles/oldland-cpu · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/jamieiles/oldland-cpu)
- [cliffordwolf/PonyLink · ★ 128 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/cliffordwolf/PonyLink)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.