# nxbyte/Verilog-Projects

<https://repo.masters-masters.com/en/repos/nxbyte/Verilog-Projects>

[Home](https://repo.masters-masters.com/en) › [nxbyte](https://repo.masters-masters.com/en/owners/nxbyte) › [Verilog-Projects](https://repo.masters-masters.com/en/repos/nxbyte/Verilog-Projects)

nxbyte/Verilog-Projects has 124 stars on GitHub. Its RepoMasters card: Prototype tier. This repository contains source code for past labs and projects…

| Field | Value |
| --- | --- |
| Owner | [nxbyte](https://repo.masters-masters.com/en/owners/nxbyte) |
| Stars | 124 |
| Forks | 25 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | MIT |
| Created | 2016 |
| Topics | verilog, xilinx, half-adder, full-adder, ripple-adder, look-ahead-adder, comparator, decoder, encoder, multiplexer |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [nxbyte/Verilog-Projects](https://github.com/nxbyte/Verilog-Projects) |

## Repository

This repository contains source code for past labs and projects involving FPGA and Verilog based designs

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by nxbyte

- [nxbyte/ARM-LEGv8 · ★ 113 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/nxbyte/ARM-LEGv8)

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- [hi631/tang-nano-9K · ★ 123 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/hi631/tang-nano-9K)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.