# openhwfoundation/core-v-mcu

<https://repo.masters-masters.com/en/repos/openhwfoundation/core-v-mcu>

[Home](https://repo.masters-masters.com/en) › [openhwfoundation](https://repo.masters-masters.com/en/owners/openhwfoundation) › [core-v-mcu](https://repo.masters-masters.com/en/repos/openhwfoundation/core-v-mcu)

openhwfoundation/core-v-mcu has 215 stars on GitHub. Its RepoMasters card: Prototype tier. This is the CORE-V MCU project, hosting CORE-V's embedded-class…

| Field | Value |
| --- | --- |
| Owner | [openhwfoundation](https://repo.masters-masters.com/en/owners/openhwfoundation) |
| Stars | 215 |
| Forks | 81 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | None |
| Created | 2020 |
| Topics | microcontroller, systemverilog, openhwgroup, riscv |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [openhwfoundation/core-v-mcu](https://github.com/openhwfoundation/core-v-mcu) |

## Repository

This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.