# openrisc/orpsoc-cores

<https://repo.masters-masters.com/en/repos/openrisc/orpsoc-cores>

[Home](https://repo.masters-masters.com/en) › [openrisc](https://repo.masters-masters.com/en/owners/openrisc) › [orpsoc-cores](https://repo.masters-masters.com/en/repos/openrisc/orpsoc-cores)

openrisc/orpsoc-cores has 125 stars on GitHub. Its RepoMasters card: Prototype tier. Core description files for FuseSoC Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [openrisc](https://repo.masters-masters.com/en/owners/openrisc) |
| Stars | 125 |
| Forks | 75 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2013 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [openrisc/orpsoc-cores](https://github.com/openrisc/orpsoc-cores) |

## Repository

Core description files for FuseSoC

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by openrisc

- [openrisc/mor1kx · ★ 594 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/openrisc/mor1kx)
- [openrisc/or1200 · ★ 184 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/openrisc/or1200)

## Nearby in Verilog

- [Lichee-Pi/Tang\_FPGA\_Examples · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/Lichee-Pi/Tang_FPGA_Examples)
- [erihsu/INT\_FP\_MAC · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/erihsu/INT_FP_MAC)
- [lac-dcc/chimera · ★ 125 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/lac-dcc/chimera)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.