# pulp-platform/cheshire

<https://repo.masters-masters.com/en/repos/pulp-platform/cheshire>

[Home](https://repo.masters-masters.com/en) › [pulp-platform](https://repo.masters-masters.com/en/owners/pulp-platform) › [cheshire](https://repo.masters-masters.com/en/repos/pulp-platform/cheshire)

pulp-platform/cheshire has 385 stars on GitHub. Its RepoMasters card: Alpha tier. A minimal Linux-capable 64-bit RISC-V SoC built around CVA6 Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [pulp-platform](https://repo.masters-masters.com/en/owners/pulp-platform) |
| Stars | 385 |
| Forks | 127 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2022 |
| Topics | fpga, riscv, rtl-design, simulation, systemverilog, asic |
| Tier | [Alpha (250 to 699 ★)](https://repo.masters-masters.com/en/ranks/b_movie) |
| View on GitHub | [pulp-platform/cheshire](https://github.com/pulp-platform/cheshire) |

## Repository

A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

The tier for repos with 250 to 699 ★. Published odds per card pulled: 20%. Rarity: Uncommon.

## More repos by pulp-platform

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- [viduraakalanka/HDL-Bits-Solutions · ★ 379 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/viduraakalanka/HDL-Bits-Solutions)
- [nandland/nandland · ★ 377 · Verilog · Alpha](https://repo.masters-masters.com/en/repos/nandland/nandland)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.