# riscv-mcu/e203\_hbirdv2

<https://repo.masters-masters.com/en/repos/riscv-mcu/e203_hbirdv2>

[Home](https://repo.masters-masters.com/en) › [riscv-mcu](https://repo.masters-masters.com/en/owners/riscv-mcu) › [e203\_hbirdv2](https://repo.masters-masters.com/en/repos/riscv-mcu/e203_hbirdv2)

riscv-mcu/e203\_hbirdv2 has 1,973 stars on GitHub. Its RepoMasters card: Beta tier. The Ultra-Low Power RISC-V Core Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [riscv-mcu](https://repo.masters-masters.com/en/owners/riscv-mcu) |
| Stars | 1,973 |
| Forks | 432 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | Apache-2.0 |
| Created | 2020 |
| Topics | risc-v, riscv, fpga, hummingbird, nuclei, soc, e203, china, verilog, low-power |
| Tier | [Beta (700 to 1,999 ★)](https://repo.masters-masters.com/en/ranks/box_office) |
| View on GitHub | [riscv-mcu/e203\_hbirdv2](https://github.com/riscv-mcu/e203_hbirdv2) |

## Repository

The Ultra-Low Power RISC-V Core

The tier for repos with 700 to 1,999 ★. Published odds per card pulled: 6%. Rarity: Rare.

## More repos by riscv-mcu

- [riscv-mcu/hbird-sdk · ★ 181 · C · Prototype](https://repo.masters-masters.com/en/repos/riscv-mcu/hbird-sdk)
- [riscv-mcu/GD32VF103\_Firmware\_Library · ★ 134 · C · Prototype](https://repo.masters-masters.com/en/repos/riscv-mcu/GD32VF103_Firmware_Library)

## Nearby in Verilog

- [alexforencich/verilog-axi · ★ 2,168 · Verilog · RC](https://repo.masters-masters.com/en/repos/alexforencich/verilog-axi)
- [XUANTIE-RV/wujian100\_open · ★ 2,032 · Verilog · RC](https://repo.masters-masters.com/en/repos/XUANTIE-RV/wujian100_open)
- [pConst/basic\_verilog · ★ 2,029 · Verilog · RC](https://repo.masters-masters.com/en/repos/pConst/basic_verilog)
- [olofk/serv · ★ 1,915 · Verilog · Beta](https://repo.masters-masters.com/en/repos/olofk/serv)
- [ufrisk/pcileech-fpga · ★ 1,852 · Verilog · Beta](https://repo.masters-masters.com/en/repos/ufrisk/pcileech-fpga)
- [ultraembedded/riscv · ★ 1,812 · Verilog · Beta](https://repo.masters-masters.com/en/repos/ultraembedded/riscv)

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Data: GitHub · Illustration: the project’s public image, pixelated by RepoMasters.