# soDLA-publishment/soDLA

<https://repo.masters-masters.com/en/repos/soDLA-publishment/soDLA>

[Home](https://repo.masters-masters.com/en) › [soDLA-publishment](https://repo.masters-masters.com/en/owners/soDLA-publishment) › [soDLA](https://repo.masters-masters.com/en/repos/soDLA-publishment/soDLA)

soDLA-publishment/soDLA has 241 stars on GitHub. Its RepoMasters card: Prototype tier. Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA)…

| Field | Value |
| --- | --- |
| Owner | [soDLA-publishment](https://repo.masters-masters.com/en/owners/soDLA-publishment) |
| Stars | 241 |
| Forks | 49 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | None |
| Created | 2018 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [soDLA-publishment/soDLA](https://github.com/soDLA-publishment/soDLA) |

## Repository

Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in Verilog

- [hkust-zhiyao/RTLLM · ★ 243 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/hkust-zhiyao/RTLLM)
- [ChFrenkel/ODIN · ★ 241 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/ChFrenkel/ODIN)
- [WangXuan95/FPGA-FixedPoint · ★ 241 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/WangXuan95/FPGA-FixedPoint)
- [chipsalliance/synlig · ★ 237 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/chipsalliance/synlig)
- [snbk001/Verilog-Design-Examples · ★ 235 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/snbk001/Verilog-Design-Examples)

---
Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.