# stnolting/neorv32

<https://repo.masters-masters.com/en/repos/stnolting/neorv32>

[Home](https://repo.masters-masters.com/en) › [stnolting](https://repo.masters-masters.com/en/owners/stnolting) › [neorv32](https://repo.masters-masters.com/en/repos/stnolting/neorv32)

stnolting/neorv32 has 2,302 stars on GitHub. Its RepoMasters card: RC tier. 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and…

| Field | Value |
| --- | --- |
| Owner | [stnolting](https://repo.masters-masters.com/en/owners/stnolting) |
| Stars | 2,302 |
| Forks | 399 |
| Language | [VHDL](https://repo.masters-masters.com/en/languages/vhdl) |
| License | BSD-3-Clause |
| Created | 2020 |
| Topics | risc-v, soft-core, vhdl, fpga, soc, microcontroller, processor, cpu, verilog, asic |
| Tier | [RC (2,000 to 4,999 ★)](https://repo.masters-masters.com/en/ranks/blockbuster) |
| View on GitHub | [stnolting/neorv32](https://github.com/stnolting/neorv32) |

## Repository

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

The tier for repos with 2,000 to 4,999 ★. Published odds per card pulled: 3%. Rarity: Epic.

## More repos by stnolting

- [stnolting/neoTRNG · ★ 231 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/stnolting/neoTRNG)
- [stnolting/neo430 · ★ 212 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/stnolting/neo430)
- [stnolting/fpga\_puf · ★ 145 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/stnolting/fpga_puf)
- [stnolting/riscv-gcc-prebuilt · ★ 107 · Shell · Prototype](https://repo.masters-masters.com/en/repos/stnolting/riscv-gcc-prebuilt)
- [stnolting/captouch · ★ 106 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/stnolting/captouch)
- [stnolting/neorv32-setups · ★ 102 · VHDL · Prototype](https://repo.masters-masters.com/en/repos/stnolting/neorv32-setups)

## Nearby in VHDL

- [ghdl/ghdl · ★ 2,917 · VHDL · RC](https://repo.masters-masters.com/en/repos/ghdl/ghdl)
- [progranism/Open-Source-FPGA-Bitcoin-Miner · ★ 1,386 · VHDL · Beta](https://repo.masters-masters.com/en/repos/progranism/Open-Source-FPGA-Bitcoin-Miner)
- [open-logic/open-logic · ★ 1,033 · VHDL · Beta](https://repo.masters-masters.com/en/repos/open-logic/open-logic)
- [VUnit/vunit · ★ 854 · VHDL · Beta](https://repo.masters-masters.com/en/repos/VUnit/vunit)

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Data: GitHub · Illustration: the project’s public image, pixelated by RepoMasters.
