# taoyilee/clacc

<https://repo.masters-masters.com/en/repos/taoyilee/clacc>

[Home](https://repo.masters-masters.com/en) › [taoyilee](https://repo.masters-masters.com/en/owners/taoyilee) › [clacc](https://repo.masters-masters.com/en/repos/taoyilee/clacc)

taoyilee/clacc has 202 stars on GitHub. Its RepoMasters card: Prototype tier. Deep Learning Accelerator (Convolution Neural Networks) Language: Verilog.

| Field | Value |
| --- | --- |
| Owner | [taoyilee](https://repo.masters-masters.com/en/owners/taoyilee) |
| Stars | 202 |
| Forks | 60 |
| Language | [Verilog](https://repo.masters-masters.com/en/languages/verilog) |
| License | MIT |
| Created | 2017 |
| Topics | eyeriss, cnn, dla, bit-serial |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [taoyilee/clacc](https://github.com/taoyilee/clacc) |

## Repository

Deep Learning Accelerator (Convolution Neural Networks)

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## Nearby in Verilog

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- [tinyfpga/TinyFPGA-B-Series · ★ 201 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/tinyfpga/TinyFPGA-B-Series)
- [sumanth-kalluri/cnn\_hardware\_acclerator\_for\_fpga · ★ 199 · Verilog · Prototype](https://repo.masters-masters.com/en/repos/sumanth-kalluri/cnn_hardware_acclerator_for_fpga)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.
