# verilog-to-routing/vtr-verilog-to-routing

<https://repo.masters-masters.com/en/repos/verilog-to-routing/vtr-verilog-to-routing>

[Home](https://repo.masters-masters.com/en) › [verilog-to-routing](https://repo.masters-masters.com/en/owners/verilog-to-routing) › [vtr-verilog-to-routing](https://repo.masters-masters.com/en/repos/verilog-to-routing/vtr-verilog-to-routing)

verilog-to-routing/vtr-verilog-to-routing has 1,281 stars on GitHub. Its RepoMasters card: Beta tier. Verilog to Routing -- Open Source CAD Flow for FPGA…

| Field | Value |
| --- | --- |
| Owner | [verilog-to-routing](https://repo.masters-masters.com/en/owners/verilog-to-routing) |
| Stars | 1,281 |
| Forks | 452 |
| Language | [C++](https://repo.masters-masters.com/en/languages/c-plus-plus) |
| License | None |
| Created | 2015 |
| Topics | vtr, fpga, cad, verilog, placement, routing, synthesis, eda, vpr |
| Tier | [Beta (700 to 1,999 ★)](https://repo.masters-masters.com/en/ranks/box_office) |
| View on GitHub | [verilog-to-routing/vtr-verilog-to-routing](https://github.com/verilog-to-routing/vtr-verilog-to-routing) |

## Repository

Verilog to Routing -- Open Source CAD Flow for FPGA Research

The tier for repos with 700 to 1,999 ★. Published odds per card pulled: 6%. Rarity: Rare.

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.