# zeroasiccorp/wildebeest

<https://repo.masters-masters.com/en/repos/zeroasiccorp/wildebeest>

[Home](https://repo.masters-masters.com/en) › [zeroasiccorp](https://repo.masters-masters.com/en/owners/zeroasiccorp) › [wildebeest](https://repo.masters-masters.com/en/repos/zeroasiccorp/wildebeest)

zeroasiccorp/wildebeest has 146 stars on GitHub. Its RepoMasters card: Prototype tier. FPGA synthesis tool Language: SystemVerilog.

| Field | Value |
| --- | --- |
| Owner | [zeroasiccorp](https://repo.masters-masters.com/en/owners/zeroasiccorp) |
| Stars | 146 |
| Forks | 8 |
| Language | [SystemVerilog](https://repo.masters-masters.com/en/languages/systemverilog) |
| License | Apache-2.0 |
| Created | 2025 |
| Tier | [Prototype (100 to 249 ★)](https://repo.masters-masters.com/en/ranks/rush) |
| View on GitHub | [zeroasiccorp/wildebeest](https://github.com/zeroasiccorp/wildebeest) |

## Repository

FPGA synthesis tool

The tier for repos with 100 to 249 ★. Published odds per card pulled: 70%. Rarity: Common.

## More repos by zeroasiccorp

- [zeroasiccorp/switchboard · ★ 325 · Python · Alpha](https://repo.masters-masters.com/en/repos/zeroasiccorp/switchboard)
- [zeroasiccorp/umi · ★ 172 · SystemVerilog · Prototype](https://repo.masters-masters.com/en/repos/zeroasiccorp/umi)

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Data: GitHub · Illustration drawn by RepoMasters from the repo’s ID and its language color.