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tscheipel/HaDes-V
HaDes-V is an Open Educational Resource for learning microcontroller design. It guides you through creating a pipelined 32-bit RISC-V processor using SystemVerilog and FPGA tools. Developed by TU Graz's EAS Group, this resource combines hands-on exercises in hardware/software co-design with practic…
- Propriétaire
- tscheipel (compte personnel)
- Étoiles
- Étoiles : 198
- Forks
- Forks : 106
- Langage
- SystemVerilog
- Licence
- MIT
- Création
- 2024
- Sujets
- assembly-programmingc-programmingcomputer-architecturegtkwavehardware-software-codesignmicrocontroller-designopen-educational-resourcespipelinesprocessor-architectureprocessor-design
- Rang
- Prototype (100 à 249 ★) Ce que veut dire ce rang
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