PrototypeCommon
PrincetonUniversity/AutoSVA
AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made in the signal declaration section of an RTL module, generate liveness properties so that the module would eventually make forward progress.
- Owner
- PrincetonUniversity (organization)
- Stars
- Stars: 105
- Forks
- Forks: 29
- Language
- Python
- License
- None
- Created
- 2021
- Topics
- designverificationrtlverilogsystemverilogsvamethodology-development
- Tier
- Prototype (100 to 249 ★) What this tier means
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