BetaRare
PyHDI/Pyverilog
Python-based Hardware Design Processing Toolkit for Verilog HDL
- Owner
- PyHDI (organization)
- Stars
- Stars: 802
- Forks
- Forks: 213
- Language
- Python
- License
- Apache-2.0
- Created
- 2013
- Topics
- verilog-hdlhardwarecompilerparserdataflow-analyzercontrol-flow-analyzercode-generatorpython
- Tier
- Beta (700 to 1,999 ★) What this tier means
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