Illustration drawn by RepoMasters from the repo’s ID and its language color. Credits
PrototypeCommon

lmesserStep/LibreSDRB210

This is a repository for the LibreSDR using the Artix 7 FPGA and AD9361

Owner
lmesserStep (personal account)
Stars
Stars: 133
Forks
Forks: 43
Language
VHDL
License
None
Created
2024
Tier
Prototype (100 to 249 ★) What this tier means
View on GitHub

Nearby in VHDL

All VHDL repos