Illustration drawn by RepoMasters from the repo’s ID and its language color. Credits
PrototypeCommon

AugustinJose1221/FPGA-Build

A novel architectural design for stitching video streams in real-time on an FPGA.

Owner
AugustinJose1221 (personal account)
Stars
Stars: 134
Forks
Forks: 30
Language
Verilog
License
MIT
Created
2021
Topics
frame-stitchingvideo-framesgaussian-kernelkeypointimageimage-processingreal-timestitching-algorithmfpgaverilog
Tier
Prototype (100 to 249 ★) What this tier means
View on GitHub

Nearby in Verilog

All Verilog repos