PrototypeCommon
Nic30/hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
- Owner
- Nic30 (personal account)
- Stars
- Stars: 227
- Forks
- Forks: 30
- Language
- Python
- License
- MIT
- Created
- 2015
- Topics
- verilogvhdlfpgahlssimulatorhcluvmsystemverilogcodegeneratorcodegen
- Tier
- Prototype (100 to 249 ★) What this tier means
More repos by Nic30
All 3 repos by Nic30- Nic30/hdlConvertorStars: 335C++Alpha
- Nic30/d3-hwschematicStars: 124JavaScriptPrototype
Nearby in Python
All Python repos- circle-group/hktexStars: 227PythonPrototype
- brainstormity/Jev-X-Sentiment-AnalysisStars: 227PythonPrototype
- VAST-AI-Research/Mira-SceneStars: 227PythonPrototype
- miracle2k/tarsnapperStars: 227PythonPrototype
- gitpython-developers/gitdbStars: 227PythonPrototype
- xattr/xattrStars: 227PythonPrototype