PrototypeCommon
WangXuan95/FPGA-DDR-SDRAM
An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。
- Owner
- WangXuan95 (personal account)
- Stars
- Stars: 224
- Forks
- Forks: 42
- Language
- Verilog
- License
- GPL-3.0
- Created
- 2021
- Topics
- fpgaddr-sdramddr1verilogrtlsoft-corecontrolleraxi4
- Tier
- Prototype (100 to 249 ★) What this tier means
More repos by WangXuan95
All 23 repos by WangXuan95- WangXuan95/FPGA-FOCStars: 994VerilogBeta
- WangXuan95/FPGA-USB-DeviceStars: 934VerilogBeta
- WangXuan95/Xilinx-FPGA-PCIe-XDMA-TutorialStars: 869BatchfileBeta
- WangXuan95/BSV_Tutorial_cnStars: 612BluespecAlpha
- WangXuan95/USTC-RVSoCStars: 442SystemVerilogAlpha
- WangXuan95/FPGA-ftdi245fifoStars: 363VerilogAlpha
Nearby in Verilog
All Verilog repos- gsmecher/minimaxStars: 231VerilogPrototype
- cameronshinn/tiny-tpuStars: 230VerilogPrototype
- Practical-UVM-Step-By-Step/Practical-UVM-Step-By-StepStars: 229VerilogPrototype
- emu-russia/breaksStars: 223VerilogPrototype
- YosysHQ/riscv-formalStars: 223VerilogPrototype
- adamgallas/llama-fpgaStars: 223VerilogPrototype