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AlphaUncommon

cliffordwolf/SimpleVOut

A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals

Owner
cliffordwolf (personal account)
Stars
Stars: 259
Forks
Forks: 34
Language
Verilog
License
None
Created
2015
Tier
Alpha (250 to 699 ★) What this tier means
View on GitHub

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