Illustration drawn by RepoMasters from the repo’s ID and its language color. Credits
PrototypeCommon

jamieiles/oldland-cpu

Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools

Owner
jamieiles (personal account)
Stars
Stars: 128
Forks
Forks: 20
Language
Verilog
License
None
Created
2013
Tier
Prototype (100 to 249 ★) What this tier means
View on GitHub

More repos by jamieiles

All 3 repos by jamieiles

Nearby in Verilog

All Verilog repos