PrototypeCommon
Juniper/open-register-design-tool
Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
- Owner
- Juniper (organization)
- Stars
- Stars: 209
- Forks
- Forks: 74
- Language
- Verilog
- License
- Apache-2.0
- Created
- 2016
- Topics
- systemrdljspecedaasicfpgaregistersuvmsystemverilogregister-descriptionssystemrdl-compiler
- Tier
- Prototype (100 to 249 ★) What this tier means
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