PrototypeCommon
StefanSredojevic/Deep-Neural-Network-Hardware-Accelerator
SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK Software
- Owner
- StefanSredojevic (personal account)
- Stars
- Stars: 117
- Forks
- Forks: 46
- Language
- SystemVerilog
- License
- None
- Created
- 2018
- Tier
- Prototype (100 to 249 ★) What this tier means
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