AlphaUncommon
dpretet/async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
- Owner
- dpretet (personal account)
- Stars
- Stars: 498
- Forks
- Forks: 102
- Language
- SystemVerilog
- License
- None
- Created
- 2017
- Topics
- verilogverificationverilog-hdlicarus-verilogfifofifo-queuefifo-cachesynthesishdlfpga
- Tier
- Alpha (250 to 699 ★) What this tier means
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