PrototypeCommon
lvd2/ay-3-8910_reverse_engineered
The reverse-engineered AY-3-8910 chip. Transistor-level schematics, verilog model and a testbench with tools, that can render register dump files into .flac soundtrack.
- Owner
- lvd2 (personal account)
- Stars
- Stars: 106
- Forks
- Forks: 11
- Language
- Verilog
- License
- GPL-3.0
- Created
- 2019
- Tier
- Prototype (100 to 249 ★) What this tier means
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