PrototypeCommon
WangXuan95/FPGA-RMII-SMII
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII，用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
- Owner
- WangXuan95 (personal account)
- Stars
- Stars: 106
- Forks
- Forks: 25
- Language
- Verilog
- License
- GPL-3.0
- Created
- 2021
- Topics
- fpgaverilogrtlethernet100m-ethernetmiirmiismiiphyethernet-phy
- Tier
- Prototype (100 to 249 ★) What this tier means
More repos by WangXuan95
All 23 repos by WangXuan95- WangXuan95/FPGA-FOCStars: 994VerilogBeta
- WangXuan95/FPGA-USB-DeviceStars: 934VerilogBeta
- WangXuan95/Xilinx-FPGA-PCIe-XDMA-TutorialStars: 869BatchfileBeta
- WangXuan95/BSV_Tutorial_cnStars: 612BluespecAlpha
- WangXuan95/USTC-RVSoCStars: 442SystemVerilogAlpha
- WangXuan95/FPGA-ftdi245fifoStars: 363VerilogAlpha
Nearby in Verilog
All Verilog repos- cavnex/mc6809Stars: 106VerilogPrototype
- lvd2/ay-3-8910_reverse_engineeredStars: 106VerilogPrototype
- ZipCPU/sdrStars: 106VerilogPrototype
- m-labs/lm32Stars: 105VerilogPrototype